Bastionchip silicon in evaluation — now accepting qualified partner requests. Request Eval Kit →
Use Cases

Defense & OEM

ITAR-aware design process. Tamper-mesh and zeroize circuitry for defense prime contractors and embedded OEM integrators with physical security requirements.

Zeroize response <1 ns
Design Process

ITAR-aware from the first RTL commit

The Bastionchip design team operates with awareness of International Traffic in Arms Regulations requirements for security silicon. Our design process is structured for programs where supply-chain traceability and access controls are not optional.

NDA-FIRST EVALUATION PROGRAM

Defense program evaluations are conducted under mutual NDA. Architecture documentation, test vector packages, and tamper-response characterization data available under NDA. Contact [email protected] to initiate.

ITAR-aware design controls
Access controls on sensitive design artifacts
Supply-chain traceability
Die serialization and provenance documentation
NDA-gated evaluation
Sensitive data package only under NDA
Defense Features

Physical security capabilities for embedded programs

Sub-nanosecond zeroize
Active tamper detection triggers key zeroize in under 1 ns. Satisfies physical security requirements for classified key material. Cryptographically logged tamper event for forensics.
Active tamper mesh
Metal mesh overlaid on all sensitive logic. Any probing, delayering, or power injection attempt detected. No external stimulus required for detection — mesh is always armed.
Extended environmental range
Industrial temperature grade −40°C to +85°C. Designed for harsh deployment environments outside of data center thermal envelopes.
PQC for future-proof missions
Kyber-768 key encapsulation and Dilithium signature hardware acceleration. Crypto-agile design allows algorithm migration without hardware replacement for long-lifecycle platforms.

Defense evaluation program

Qualified defense prime contractors and OEM integrators: contact us to initiate an NDA. Evaluation silicon, tamper-response characterization data, and architecture documentation available under NDA.